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Dataflow Programming for Multicore Systems
sponsored by National Instruments
Posted:  19 Feb 2008
Published:  01 Jan 2007
Format:  PDF
Length:  4  Page(s)
Type:  White Paper
Language:  English

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ABSTRACT:

Processor speeds have hit a wall in recent years. Moore's Law, which states that the number of transistors on a chip will double every 18 to 24 months, still holds true as it has for the last 40 years, but it no longer translates into a linear increase in performance. Previously, chip manufacturers increased processor clock speed to double chip performance - from 100 MHz to 200 MHz and more recently into the multi-Gigahertz (GHz) range.

Today, however, increasing clock speeds for performance gains is not viable because of power consumption and heat dissipation constraints. Chip vendors have instead moved to entirely new chip architectures with multiple processor cores on a single chip. With multicore processors, programmers can complete more total work than with one core alone. To take advantage of multicore processors, programmers must reconsider how they develop applications. In the words of Herb Sutter, Microsoft software architect, the "free lunch is over" for developers who expect to see immediate software application performance gains when end users simply upgrade their computers to ones with faster processors. In short, software had it easy for a long time, but this is no longer the case.

Sequential programs saw performance improvements as a result of processor clock speed increases; upgrading to a computer with a faster CPU meant that each individual instruction in a series would run faster. To continue seeing performance gains with multicore systems, you need to design applications that divide the work among cores - in essence develop a parallel application instead of a sequential one.
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